Title: FPGA Engineer Location: San Diego, CA Duration: : 12 Months Work Type:Hybrid (2 days/week) Job Description: Support FPGA debug, simulation and test activities for existing platforms for defined features/escalations Create updated RTL design for identified issues and block level sims utilizing UVMF Support test case generation for UVMF Support mono, functional & SW integration through customer delivery Documentation updates/generation Hard Skills: Writing & Updating VHDL RTL Advanced in FPGA design (using VHDL) and Module / Multi-Module verification (System Verilog). Proficient with automated self-checking test bench verification (QuestaSim) in UVM. Ability to complete timing simulation/post route simulation and static timing analysis. Strong experience in hardware development tools and IDE for Xilinx devices (e.g. Vivado) Proficient in FPGA concepts, architectures and protocols (SOC, bus topology, CDC, PCIe, TSN, UART, SPI, AXI, PTP, SRIO, etc.) Soft Skills: Can read and interpret data, information, and documents. Creative problem solving for complex issues. Track record of completing assignments with attention to detail and high degree of accuracy (‘quality’) Ability to perform effectively in a demanding environment, within provided timelines, and with changing workloads. Professional communication which is clear and concise. #J-18808-Ljbffr Recooty Inc.
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